Predicting and Prefetching Tlb Entries from Irregular Access Streams

This thesis describes the design and evaluation the Irregular Translation Buffer (ITB), which is a prefetcher for translation lookaside buffer (TLB) entries that is based on the Irregular Stream Buffer (ISB) introduced by Jain and Lin [1]. The main idea to use the ISB's improvements in prefetching cache lines from irregular access streams and use them to prefetch entries from irregular access streams for the translation lookaside buffer (TLB). The ISB is particularly good at tracking irregular access streams, which are sequences of temporally correlated memory reads. The ITB attempts to translate the ISB's strengths from the realm of prefetching cache lines to that of prefetching TLB entries. I evaluate the ITB using the MARSS full x86 system simulator and several dual-core SPECint and SPECfp 2006 benchmarks to evaluate the ITB. I was unable to show that the ITB causes these workloads to exhibit a speedup due to a lack of prefetch candidates that are not already found in the TLB. Based in this result, I discuss possible workloads that could be used to better evaluate the ITB.